Bayes-dirichlet Bdd as a Probabilistic Model for Logic Function and Evolutionary Circuit Decomposer
نویسندگان
چکیده
This paper deals with the utilizing of Binary Decision Diagrams built on the Bayes-Dirichlet metric for representation of logic functions. In the first phase the Binary Decision Tree is built followed by a reduction process resulted in binary decision diagram (BDD). The BDDs are also used as a probabilistic model for advanced Bayesian decomposer for digital circuit partitioning. It is shown that this approach is more efficient than the utilizing of Bayesian networks (BN) and in addition the concept of BDDs parallelization is simple to implement.
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